Key Points
- IIT Madras launches India's first indigenous silicon photonics chip design tools
- Process Design Kit contains over 50 verified components for photonic chip development
- MPW fabrication runs to begin from July 2026 with Malaysian foundry partner
Indian researchers and startups can now design advanced photonic chips using domestically developed tools, following the launch of two silicon photonics technology solutions at IIT Madras on 24 April 2026.
S Krishnan, secretary, Ministry of Electronics and Information Technology (MeitY), unveiled a Process Design Kit (PDK) and a Programmable Photonic Integrated Circuit (PPIC) test engine developed at the MeitY-sponsored Centre of Excellence for Compound Semiconductors and Photonic Integrated Circuits (CoE-CPPICS) at IIT Madras.
Silicon photonics is a technology that uses light instead of electrical signals to transmit data through chips, enabling faster speeds and lower power consumption.
What the New Tools Offer
The indigenously developed PDK contains over 50 verified components. A PDK is a library of pre-designed building blocks that chip designers use to create new circuits, similar to how architects use standard components to design buildings.
This library will enable industries, startups, academic institutions and defence research organisations to develop photonic integrated circuits without relying on foreign design tools.
The PPIC test engine is an automated characterisation platform for photonic and optoelectronic modules. It allows researchers to measure and verify how their chip designs perform across various applications before committing to expensive manufacturing runs.
Both facilities will function as shared national resources for the Indian photonics research community.
Path to Manufacturing Capability
Amitesh Sinha, additional secretary, MeitY, and chief executive officer of India Semiconductor Mission (ISM), said the technology has applications in both classical and quantum computing. He stated that with appropriate industry partners, such technology could receive support under the upcoming ISM 2.0 research and development vertical for further improvements and product development.
Sinha added that after successful demonstration of commercial capabilities, a silicon photonics fabrication facility with integrated packaging could be established in India.
Krishnan said India’s silicon photonics capabilities now match global standards. He noted this needed to be complemented with the establishment of a silicon photonics fab under ISM.
Fabrication Runs to Begin in Q3
The centre will begin enabling silicon photonics multi-project wafer (MPW) fabrication runs from July 2026, according to Bijoy Krishna Das, chief investigator at CoE-CPPICS. MPW runs allow multiple chip designs from different organisations to be manufactured together on a single wafer, reducing costs for each participant.
“Starting in Q3 of this financial year, our center will enable Silicon Photonics MPW fabrication runs while offering comprehensive testing, packaging, and module characterization,” Das said. “We deeply appreciate MeitY’s steadfast support in making this possible.”
The centre operates on a product research, development and manufacturing model. It uses CMOS-compatible silicon photonics technology, meaning designs can be manufactured using the same fabrication processes used for conventional computer chips.
SilTerra Malaysia serves as the foundry partner for chip manufacturing, while Bengaluru-based izmo Microsystems handles photonic chip packaging.
Your Questions, Answered
What is silicon photonics and why does it matter?
Silicon photonics uses light instead of electrical signals to transmit data through chips. This enables faster data transfer speeds and lower power consumption compared to traditional electronic chips, making it critical for data centres, telecommunications and quantum computing.
What can Indian researchers do with the new PDK?
The Process Design Kit provides over 50 pre-verified components that researchers, startups and defence organisations can use to design photonic integrated circuits. Previously, Indian designers depended on foreign tools for this capability.
When will chip fabrication services become available?
CoE-CPPICS will begin enabling multi-project wafer fabrication runs from July 2026, with SilTerra Malaysia as the foundry partner and izmo Microsystems in Bengaluru handling packaging.
Does India plan to build a silicon photonics fabrication facility?
MeitY officials indicated that after demonstrating commercial capabilities, a silicon photonics fab with integrated packaging facilities may be established in India under India Semiconductor Mission 2.0.
